The present invention is directed, in general, to a method of determining the yield and reliability of a semiconductor device and, more specifically, to a method of determining the yield and reliability of a semiconductor device with respect to an antenna ratio and an oxide area of the semiconductor device.
As is well known, an increasing number of metal and dielectric interconnect levels are currently being added to semiconductor devices manufactured today. The increasing number of levels allow the semiconductor manufacturing industry the flexibility to maintain superior device speed while saving semiconductor wafer real estate. Using an increasing number of levels introduces additional processing steps, including manufacturing metal layers and interconnects to connect such additional levels. Moreover, the increasing number of processing steps use plasma sources that are necessary to create very small, high aspect ratio features. Also, gate oxides are becoming thinner to accommodate a decrease in the size of integrated circuits (ICs) in general, and provide for faster operating speeds of these devices. Due to the increased number of levels and processing steps, the IC devices are subjected to an increased amount of plasma charging during interconnect formation. This has caused problems with the thinner gate oxides associated with today""s IC devices because these thinner gate oxides are highly susceptible to plasma charging damage.
Plasma charging damage typically occurs during metal etch, dielectric deposition, window etch or other processes used when manufacturing a semiconductor device. The damage results when ions and electrons introduced by the plasma process, continually bombard the surface of a metal structure that is electrically connected to a transistor device. The plasma ions and electrons force a current through the thin gate oxide by way of conductive metal structures connected electrically to the gate oxides. If enough charge is transported through the oxide, the operational lifetime of the device can be reduced significantly or the device may even fail during the charging process itself.
It is commonly known in the industry that the amount of damage to a gate oxide, scales with the size of the metal antenna (antenna ratio) connected to the gate oxide. An antenna ratio is, as one having skill in the art already knows, the effective metal area exposed to the plasma divided by the gate oxide area. The semiconductor industry generally uses this knowledge, coupled with tests performed on extremely large antenna ratio testers, to set antenna rules on the product design. Thereafter, the device is manufactured according to the antenna ratio design rules that will minimize the amount of plasma damage to the gate oxide. However, even though it may be determined from the large antenna ratio testers how much plasma damage to the gate oxide might occur within the test device, it is not presently known how to predict from these tests how much damage occurs to the actual product during the manufacturing process. Without the ability to predict the damage impact on the completed product, and hence to quantitatively establish antenna design rules, the only way to ensure product reliability is to reduce the process damage as much as possible, and simultaneously, but arbitrarily, use as tight of design rules as possible.
Accordingly, what is needed in the art is a method of quantitatively predicting the yield and reliability projections for a generic IC product from antenna test results, which does not experience the problems associated with the prior art methods.
To address the above-discussed deficiencies of the prior art, the present invention provides a method of determining a reliability of a semiconductor device. In an exemplary embodiment, the method determines an oxide stress voltage as a function of an antenna ratio of a semiconductor device, determines an oxide area of the semiconductor device and determines a failure fraction of the semiconductor device as a function of the oxide stress voltage and the oxide area.